Exploiting Hysteresis in a CMOS Bu er
نویسندگان
چکیده
|A high drive CMOS bu er circuit characterized by a voltage transfer characteristic (VTC) with low threshold voltages and hysteresis is proposed. The proposed circuit is capable of restoring slow transition times and distorted input signals with a minimum delay penalty. Due to the hysteresis characteristic of this bu er, a comparison with a Schmitt-trigger is provided. An important application of this circuit is the restoration of slow transitioning signals propagated along an RC interconnect. The circuit can be used in conjunction with existing repeater insertion methodologies to decrease the delay of an RC
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